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  fds6982 fds6982, re v . d1 fds6982 dual n-channel, notebook power supply mosfet june 1999 features ? q2: 8.6a, 30v. r ds(on) = 0.015 ? @ v gs = 10v r ds(on) = 0.020 ? @ v gs = 4.5v ? q1: 6.3a, 30v. r ds(on) = 0.028 ? @ v gs = 10v r ds(on) = 0.035 ? @ v gs = 4.5v ? fast switching speed. ? high performance trench technology for extremely low r ds(on) . ? 1999 fairchild semiconductor corporation absolute maximum ratings t a = 25c unless otherwise noted symbol parameter q2 q1 units v dss drain-source voltage 30 30 v v gss gate-source voltage 20 20 v i d drain current - continuous (note 1a) 8.6 6.3 a - pulsed 30 20 p d power dissipation for dual operation 2 w power dissi p ation for sin g le o p eration ( note 1a ) 1.6 (note 1b) 1 (note 1c) 0.9 t j , t stg operating and storage junction temperature range -55 to +150 c thermal characteristics r ja thermal resistance, junction-to-ambient (note 1a) 78 c/w r jc thermal resistance, junction-to-case (note 1) 40 c/w package marking and ordering information device marking device reel size tape width quantity f d s 69 82 f d s 69 82 13? 12 m m 2500 un i ts general description this part is designed to replace two single so-8 mosfets in synchronous dc:dc power supplies that provide the various peripheral voltage rails required in notebook computers and other battery powered electronic devices. fds6982 con t ains two unique 30 v , n-channel, logic level, power t renc h a mosfe t s designed to maximize power conversion efficiency. the high-side switch (q1) is designed with specific emphasis on reducing switching losses while the low-side switch (q2) is optimized for low conduction losses (less than 20m ? at v gs = 4.5v). applications ? battery powered synchronous dc:dc converters. ? embedded dc:dc conversion. so-8 d2 d1 d1 d2 s2 s1 g2 g1 pin 1 1 5 7 8 2 3 4 6 q1 q2
fds6982 fds6982, re v . d1 electrical characteristics t a = 25c unless otherwise noted symbol parameter test conditions type min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = 250 a q2 q1 30 30 v ? bv dss ? t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c q2 q1 27 26 mv/ c i dss zero gate voltage drain current v ds = 24 v, v gs = 0 v all 1 a i gssf gate-body leakage, forward v gs = 20 v, v ds = 0 v all 100 na i gssr gate-body leakage, reverse v gs = -20 v, v ds = 0 v all -100 na on characteristics (note 2) v gs(th) gate threshold voltage v ds = v gs , i d = 250 a q2 q1 1 1 2.2 1.6 3 3 v ? v gs(th) ? t j gate threshold voltage temperature coefficient i d = 250 a, referenced to 25 c q2 q1 -5 -4 mv/ c v gs = 10 v, i d = 8.6 a v gs = 10 v, i d = 8.6 a, t j = 125 c v gs = 4.5 v, i d = 7.5 a q2 0.012 0.018 0.016 0.015 0.024 0.020 ? r ds(on) static drain-source on-resistance v gs = 10 v, i d = 6.3 a v gs = 10 v, i d = 6.3 a, t j = 125 c v gs = 4.5 v, i d = 5.6 a q1 0.021 0.038 0.028 0.028 0.047 0.035 ? i d(on) on-state drain current v gs = 10 v, v ds = 5 v q2 q1 30 20 a g fs forward transconductance v ds = 5 v, i d = 8.6 a v ds = 5 v, i d = 6.3 a q2 q1 50 40 s dynamic characteristics c iss input capacitance q2 q1 2085 760 pf c oss output capacitance q2 q1 420 160 pf c rss reverse transfer capacitance v ds = 10 v, v gs = 0 v, f = 1.0 mhz q2 q1 160 70 pf
fds6982 fds6982, re v . d1 electrical characteristics (continued) t a = 25c unless otherwise noted s y mbol parameter test conditions type min t yp max units switching characteristics (note 2) t d(on) turn-on delay time q2 q1 15 10 27 18 ns t r turn-on rise time q2 q1 11 14 20 25 ns t d(off) turn-off delay time q2 q1 36 21 58 34 ns t f turn-off fall time v dd = 15 v, i d = 1 a, v gs = 10v, r gen = 6 ? q2 q1 18 7 29 14 ns q g total gate charge q2 q1 18.5 8.5 26 12 nc q gs gate-source charge q2 q1 7.3 2.4 nc q gd gate-drain charge q2 v ds = 15 v, i d = 8.6 a, v gs = 5 v q1 v ds = 15 v, i d = 6.3 a,v gs = 5 v q2 q1 6.2 3.1 nc drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current q2 q1 1.3 1.3 a v sd drain-source diode forward voltage v gs = 0 v, i s = 1.3 a (note 2) v gs = 0 v, i s = 1.3 a (note 2) q2 q1 0.72 0.74 1.2 1.2 v notes: 1. r ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. r jc is guaranteed by design while r ca is determined by the user's board design.thermal rating based on independant single device opperation. scale 1 : 1 on letter size paper 2. pulse test: pulse width 300 s, duty cycle 2.0% a) 78 c/w when mounted on a 0.5 in 2 pad of 2 oz. copper. b) 125 c/w when mounted on a 0.02 in 2 pad of 2 oz. copper. c) 135 c/w when mounted on a minimum pad.
fds6982 fds6982, re v . d1 typical characteristics: q2 figure 1. on-region characteristics. figure 2. on-resistance variation with drain current and gate voltage. figure 3. on-resistance variation with temperature. figure 4. on-resistance variation with gate-to-source voltage. figure 5. transfer characteristics. figure 6. body diode forward voltage variation with source current and temperature. 0 10 20 30 40 50 01234 v ds , drain-source voltage (v) v gs = 10v 3.5v 3.0v 4.5v 4.0v 5.0v 0.8 1 1.2 1.4 1.6 1.8 2 0 1020304050 i d , drain current (a) v gs = 4.0v 6.0v 5.0v 4.5v 7.0v 10v 0 10 20 30 40 50 123456 v gs , gate to source voltage (v) t a = -55 o c 25 o c 125 o c v ds = 5v 0.0001 0.001 0.01 0.1 1 10 100 00.40.81.21.6 v sd , body diode forward voltage (v) t a = 125 o c 25 o c -55 o c v gs = 0v 0.6 0.8 1 1.2 1.4 1.6 -50 -25 0 2 5 5 0 7 5 100 125 150 t j , junction temperature ( o c) i d = 8.6a v gs = 10v 0 0.01 0.02 0.03 0.04 246810 v gs , gate to source voltage (v) i d = 4.5a t a = 125 o c t a = 25 o c
fds6982 fds6982, re v . d1 typical characteristics: q2 (continued) figure 7. gate-charge characteristics. figure 8. capacitance characteristics. figure 9. maximum safe operating area. figure 10. single pulse maximum power dissipation. 0 2 4 6 8 10 0 5 10 15 20 25 30 35 q g , gate charge (nc) i d = 8.6a v ds = 5v 10v 15v 0 500 1000 1500 2000 2500 3000 0 5 10 15 20 25 30 v ds , drain to source voltage (v) c iss c rss c oss f = 1mhz v gs = 0 v 0.01 0.1 1 10 100 0.1 1 10 100 v ds , drain-source voltage (v) dc 10s 1s 100ms 10ms 1ms 100 ja = 135 o c/w t a = 25 o c 0 5 10 15 20 25 30 0.01 0.1 1 10 100 1 000 single pulse time (sec) single pulse r ja = 135 o c/w ta = 25 o c
fds6982 fds6982, re v . d1 typical characteristics: q1 figure 11. on-region characteristics. figure 12. on-resistance variation with drain current and gate voltage. figure 13. on-resistance variation with temperature. figure 14. on-resistance variation with gate-to-source voltage. figure 15. transfer characteristics. figure 16. body diode forward voltage variation with source current and temperature. 0 10 20 30 40 01234 v ds , drain-source voltage (v) v gs = 10v 3.5v 3.0v 4.5v 4.0v 6.0v 2.5v 0.8 1 1.2 1.4 1.6 1.8 2 0 10203040 i d , drain current (a) v gs = 3.5v 6.0v 5.0v 4.5v 4.0v 10v 0 10 20 30 40 123456 v gs , gate to source voltage (v) t a = -55 o c 25 o c 125 o c v ds = 5v 0.0001 0.001 0.01 0.1 1 10 100 0 0.4 0.8 1.2 1.6 v sd , body diode forward voltage (v) t a = 125 o c 25 o c -55 o c v gs = 0v 0.6 0.8 1 1.2 1.4 1.6 -50 -25 0 2 5 5 0 7 5 100 125 150 t j , junction temperature ( o c) i d = 6.3a v gs = 10v 0 0.02 0.04 0.06 0.08 246810 v gs , gate to source voltage (v) i d = 3.5a t a = 125 o c t a = 25 o c
fds6982 fds6982, re v . d1 typical characteristics: q1 (continued) figure 17. gate-charge characteristics. figure 18. capacitance characteristics. figure 19. maximum safe operating area. figure 20. single pulse maximum power dissipation. 0 2 4 6 8 10 0481216 q g , gate charge (nc) i d = 6.3a v ds = 5v 10v 15v 0 200 400 600 800 1000 1200 0 5 10 15 20 25 30 v ds , drain to source voltage (v) c iss c rss c oss f = 1mhz v gs = 0 v 0 5 10 15 20 25 30 0.01 0.1 1 10 100 1 000 single pulse time (sec) single pulse r ja = 135 o c/w ta = 25 o c 0.01 0.1 1 10 100 0.1 1 10 100 v ds , drain-source voltage (v) dc 10s 1s 100ms 10ms 1ms 100 ja = 135 o c/w t a = 25 o c
fds6982 fds6982, re v . d1 typical characteristics: q1 & q2 (continued) figure 21. transient thermal response curve. 0.0001 0.001 0.01 0.1 1 10 100 300 0.001 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 t , time (sec) transient thermal resistance r(t), normalized effective 1 single pulse d = 0.5 0.1 0.05 0.02 0.01 0.2 duty cycle, d = t /t 1 2 r (t) = r(t) * r r = 135c/w ja ja ja t - t = p * r (t) ja a j p(pk) t 1 t 2
disclaimer fairchild semiconductor reserves the right to make changes without further notice t o any products herein t o improve reliability , function or design. fairchild does not assume any liability arising out of the applica tion or use of any product or circuit described herein; neither does it convey any license under its p a tent rights, nor the rights of others. trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production optologic? optoplanar? pacman? pop? power247? powertrench qfet? qs? qt optoelectronics? quiet series? silent switcher fast fastr? frfet? globaloptoisolator? gto? hisec? isoplanar? littlefet? microfet? micropak? microwire? rev. h4 a acex? bottomless? coolfet? crossvolt ? densetrench? dome? ecospark? e 2 cmos tm ensigna tm fact? fact quiet series? smart start? star*power? stealth? supersot?-3 supersot?-6 supersot?-8 syncfet? tinylogic? trutranslation? uhc? ultrafet a a a star*power is used under license vcx?


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